It uses the standard 0.100" (2.54mm) pitch for both the mating interface and row spacing, making it a direct footprint match for legacy and current dual-row ribbon-cable IDC receptacles or board-to-board stacking applications. All 72 positions are loaded with square male pins in phosphor bronze, finished with 100.0µin (2.54µm) of tin on the mating surface and tin on the solder posts.
Rated 5 A per contact at 110 V, the 68022-472HLF is a signal-level header — the 5 A per circuit is typical for tin-plated contacts at this pitch and is adequate for logic-level power, I/O, and control signals. The 0.100" pitch and 0.100" row spacing produce a standard 0.100" x 0.100" grid that matches the footprint of legacy BergStik and competing 0.100" dual-row headers, so board layout reuse is straightforward.