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Differential pair impedance calculator

Estimate the differential impedance of an edge-coupled PCB pair — microstrip on an outer layer or stripline buried between planes — for USB, HDMI and Ethernet routing.

Stack-up & trace geometry

Transmission-line type

Microstrip couples through air and board; stripline is buried between two planes.

Per-trace width, mm

Gap between the two traces, mm

To ground plane (microstrip) or half the core (stripline), mm

mm — 1 oz copper ≈ 0.035 mm

FR4 ≈ 4.2, hi-end FR4 ≈ 4.5

Single-ended impedance (Z0)
72.6Ω
Differential impedance (Zdiff)
103.4Ω
Effective dielectric (εe)
3.04

Close to HDMI / 100BASE-T Ethernet (100 Ω) — verify with the fabricator's stack-up

About the model

The tool first computes the single-ended impedance of one trace (IPC-2141 microstrip / centred stripline), then applies the standard edge-coupled reduction: the presence of the neighbour trace pulls the differential impedance below 2× Z0, by an amount that depends on S/H. Tight spacing couples harder and lowers Zdiff; wide spacing approaches the 2× Z0 asymptote. A 90 Ω USB pair is often drawn with ~0.1–0.2 mm width and spacing on a 0.1–0.2 mm dielectric. Real impedance depends on the fabricator's stack-up, solder mask and etch tolerance, so confirm with the board house's impedance coupons.

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Frequently asked questions

How is differential pair impedance calculated?

The tool first computes the single-ended impedance of one trace with the IPC-2141 microstrip or centred-stripline formulas, then applies the edge-coupled reduction: Zdiff ≈ 2·Z0·(1 − 0.48·exp(−0.96·S/H)) for microstrip and Zdiff ≈ 2·Z0·(1 − 0.347·exp(−2.9·S/B)) for stripline, where S is the edge-to-edge spacing, H the dielectric height to the ground plane (microstrip) or per side (stripline), and B = 2H + T the total plane-to-plane spacing.

What differential impedance do USB, HDMI and Ethernet need?

USB 2.0 and USB 3.x both target 90 Ω differential (the USB-IF SuperSpeed spec calls out 90 Ω nominal), while HDMI and 100BASE-T Ethernet specify 100 Ω. As a rule of thumb a loosely coupled pair lands near 2× the single-ended impedance, so a 90 Ω pair is designed with roughly 45 Ω per line. The tool flags whether your geometry lands inside a ±10% window of the common targets.

How do I design a 100 Ω differential pair on FR4?

Start from a thin dielectric: a common starting point is W ≈ 0.1–0.2 mm, S ≈ 0.1–0.2 mm on H ≈ 0.1–0.2 mm to the ground plane (microstrip, εr 4.2). Tight spacing couples the lines and pulls Zdiff down; wider spacing approaches the 2× Z0 asymptote. Real impedance depends on the fabricator stack-up, solder mask and etch tolerance, so always confirm with the board house impedance coupons.

How it works

A differential pair carries its signal as the difference between two traces, so common-mode noise cancels at the receiver. Edge coupling between the two lines lowers the differential impedance below 2× the single-ended value — the tighter the spacing, the stronger the coupling. The IPC-2141 approximations above are standard design-guide formulas; for production boards the fabricator's field-solver stack-up analysis is authoritative. IC Source Direct provides this tool for reference only.

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